SHI, Youhua

J-GLOBAL         Last updated: Oct 3, 2018 at 11:23
 
Avatar
Name
SHI, Youhua
E-mail
shiwaseda.jp
URL
http://www.eps.sci.waseda.ac.jp/teachers_popup/shi.html
Affiliation
Waseda University
Section
Faculty of Science and Engineering School of Fundamental Science and Engineering
Job title
Associate Professor
Degree
Doctor of Engineering
Research funding number
70409655

Research Areas

 
 

Education

 
 
 - 
2005
Graduate School, Division of Engineering, Waseda University
 

Awards & Honors

 
Nov 2012
IEEK Best Paper Award
 

Published Papers

 
Kento Hasegawa,Youhua Shi,Nozomu Togawa
17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications / 12th IEEE International Conference On Big Data Science And Engineering, TrustCom/BigDataSE 2018, New York, NY, USA, August 1-3, 2018   1891-1896   2018   [Refereed]
Saki Tajima,Nozomu Togawa,Masao Yanagisawa,Youhua Shi
IEICE Transactions   101-A(7) 1025-1034   Jul 2018   [Refereed]
Copyright © 2018 The Institute of Electronics, Information and Communication Engineers. To deal with the reliability issue caused by soft errors, this paper proposed a low power soft error hardened latch (SHC) design using a novel Schmitt-Trigger-...
Ken Hayamizu,Nozomu Togawa,Masao Yanagisawa,Youhua Shi
IEICE Transactions   101-A(7) 1014-1024   2018   [Refereed]
Jinghao Ye,Youhua Shi,Nozomu Togawa,Masao Yanagisawa
12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017   311-314   2017   [Refereed]
Saki Tajima,Nozomu Togawa,Masao Yanagisawa,Youhua Shi
12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017   52-55   2017   [Refereed]
Masaru Oya,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
17th International Symposium on Quality Electronic Design, ISQED 2016, Santa Clara, CA, USA, March 15-16, 2016   152-157   2016   [Refereed]
Koki Igawa,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
17th International Symposium on Quality Electronic Design, ISQED 2016, Santa Clara, CA, USA, March 15-16, 2016   75-80   2016   [Refereed]
Weiwei Shan,Wentao Dai,Youhua Shi,Peng Cao 0002,Xiaoyan Xiang
IEICE Electronic Express   13(8) 20160095   2016   [Refereed]
Koki Igawa,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
28th IEEE International System-on-Chip Conference, SOCC 2015, Beijing, China, September 8-11, 2015   7-12   2015   [Refereed]
Masaru Oya,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015   465-470   2015   [Refereed]
Shinnosuke Yoshida,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015   1-4   2015   [Refereed]
Saki Tajima,Youhua Shi,Nozomu Togawa,Masao Yanagisawa
2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015   1-4   2015   [Refereed]
Masaru Oya,Youhua Shi,Noritaka Yamashita,Toshihiko Okamura,Yukiyasu Tsunoo,Satoshi Goto,Masao Yanagisawa,Nozomu Togawa
IEICE Transactions   98-A(12) 2537-2546   2015   [Refereed]
Shinnosuke Yoshida,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
IEICE Transactions   98-A(7) 1406-1418   2015   [Refereed]
Shin-ya Abe,Youhua Shi,Kimiyoshi Usami,Masao Yanagisawa,Nozomu Togawa
IEICE Transactions   98-A(7) 1376-1391   2015   [Refereed]
Hiroaki Igarashi,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014, Santiago, Chile, February 25-28, 2014   1-4   2014   [Refereed]
Youhua Shi,Nozomu Togawa
2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014   735-738   2014   [Refereed]
Masaru Oya,Yuta Atobe,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014   555-558   2014   [Refereed]
Shinnosuke Yoshida,Youhua Shi,Masao Yanagisawa,Nozomu Togawa
2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014   300-303   2014   [Refereed]
Shin-ya Abe, Youhua Shi, Kimiyoshi Usami, Masao Yanagisawa, and Nozomu Togawa
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences   Vol. E96-A(No. 12) 2597-2611   Dec 2013

Misc

 
吉田 慎之介, 史 又華, 柳澤 政生
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   115(465) 73-78   Feb 2016
大屋 優, 史 又華, 柳澤 政生
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   115(465) 79-84   Feb 2016
大屋 優, 史 又華, 山下 哲孝
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   115(339) 141-146   Dec 2015
大屋 優, 史 又華, 山下 哲孝
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   115(338) 141-146   Dec 2015
田島 咲季, 史 又華, 戸川 望
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   115(338) 123-127   Dec 2015
田島 咲季, 史 又華, 戸川 望
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   115(339) 123-127   Dec 2015
TAJIMA Saki, SHI Youhua, TOGAWA Nozomu, YANAGISAWA Masao
Proceedings of the IEICE Engineering Sciences Society/NOLTA Society Conference   2015    Aug 2015
平野 大輔, 史 又華, 戸川 望
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報   115(21) 51-55   May 2015
平野 大輔, 史 又華, 戸川 望, 柳澤 政生
情報処理学会研究報告. SLDM, [システムLSI設計技術]   2015(10) 1-5   May 2015
Recently, fault analysis has attracted a lot of attentions as a new kind of side channel attack methods, in which malicious faults are generally injected by attackers through clock glitch generation, voltage change, or laser manipulation during th...
TAJIMA Saki, SHI Youhua, TOGAWA Nozomu, YANAGISAWA Masao
Technical report of IEICE. VLD   114(476) 55-60   Mar 2015
In recent technology scaling, reduction of reliability by soft-error and increase power has appeared as an inevitable problem for logic circuits. We propose a low-power and high soft-error tolerant latch called TSPC-SEH latch based Soft Error Hard...

Conference Activities & Talks

 
井上 雄太, 戸川 望, 柳澤 政生, 史 又華
回路とシステムワークショップ論文集 Workshop on Circuits and Systems   17 May 2018   
伊藤 卓, 戸川 望, 柳澤 政生, 史 又華
回路とシステムワークショップ論文集 Workshop on Circuits and Systems   17 May 2018   
杉山 貴紀, 戸川 望, 柳澤 政生, 史 又華
回路とシステムワークショップ論文集 Workshop on Circuits and Systems   17 May 2018   
Saki Tajima, Nozomu Togawa, Masao Yanagisawa, Youhua Shi
Proceedings of International Conference on ASIC   8 Jan 2018   
© 2017 IEEE. As semiconductor technology continues scaling down, the reliability issue has become much more critical than ever before. Unlike traditional hard-errors caused by permanent physical damage which can't be recovered in field, soft error...
Jinghao Ye, Youhua Shi, Nozomu Togawa, Masao Yanagisawa
Proceedings of International Conference on ASIC   8 Jan 2018   
© 2017 IEEE. In this paper, a low cost and high speed CSD-based symmetric transpose block FIR design was proposed for low cost digital signal processing. First, the existing area-efficient CSD-based multiplier was optimized by considering the reus...
中垣 直道, 戸川 望, 柳澤 政生, 史 又華
回路とシステムワークショップ論文集 Workshop on Circuits and Systems   11 May 2017   
田島 咲季, 戸川 望, 柳澤 政生, 史 又華
回路とシステムワークショップ論文集 Workshop on Circuits and Systems   11 May 2017   
早水 謙, 戸川 望, 柳澤 政生, 史 又華
回路とシステムワークショップ論文集 Workshop on Circuits and Systems   11 May 2017   
川合 洋平, 戸川 望, 柳澤 政生, 史 又華
回路とシステムワークショップ論文集 Workshop on Circuits and Systems   11 May 2017   
Shinnosuke Yoshida, Youhua Shi, Masao Yanagisawa, Nozomu Togawa
Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015   21 Jul 2016   
© 2015 IEEE. As process technology is scaling down, timing speculation techniques such as Razor and STEP are emerged as alternative solutions to reduce required margins due to various variation effects. Unlike Razor, STEP is a prediction-based tim...
Saki Tajima, Youhua Shi, Nozomu Togawa, Masao Yanagisawa
Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015   21 Jul 2016   
© 2015 IEEE. As process technology continues scaling, low power and reliability of integrated circuits are becoming more critical than ever before. Particularly, due to the reduction of node capacitance and operating voltage for low power consumpt...
Masaru Oya, Youhua Shi, Masao Yanagisawa, Nozomu Togawa
Proceedings - International Symposium on Quality Electronic Design, ISQED   25 May 2016   
© 2016 IEEE. Due to the fact that we do not know who will create hardware Trojans (HTs), and when and where they would be inserted, it is very difficult to correctly and completely detect all the real HTs in untrusted ICs, and thus it is desired t...
Koki Igawa, Youhua Shi, Masao Yanagisawa, Nozomu Togawa
Proceedings - International Symposium on Quality Electronic Design, ISQED   25 May 2016   
© 2016 IEEE. In this paper, we propose a delay variation and floorplan aware high-level synthesis algorithm with body biasing, which minimizes the average leakage energy of manufactured chips. To realize a floorplan-oriented high-level synthesis, ...
田島 咲季, 史 又華, 戸川 望, 柳澤 政生
回路とシステムワークショップ論文集 Workshop on Circuits and Systems   12 May 2016   
Koki Igawa, Youhua Shi, Masao Yanagisawa, Nozomu Togawa
International System on Chip Conference   12 Feb 2016   
© 2015 IEEE. In order to tackle a process-variation problem, we can define several scenarios, each of which corresponds to a particular LSI behavior, such as a typical-case scenario and a worst-case scenario. By designing a single LSI chip which r...
Mika Fujishiro, Youhua Shi, Masao Yanagisawa, Nozomu Togawa
Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015   30 Sep 2015   
© 2015 IEEE. There are a number of studies on a side-channel attack which uses information exploited from the physical implementation of a cryptosystem. A scan-based side-channel attack utilizes scan chains, one of design-for-test techniques and r...
Yi Wang, Youhua Shi, Chao Wang, Yajun Ha
Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015   30 Sep 2015   
© 2015 IEEE. As embedded systems play more and more important roles Internet of Things (IoT), the integration of cryptographic functionalities is an urgent demand to ensure data and information security. Recently, Keccak was declared as the winner...
Kazushi Kawamura, Yuta Hagio, Youhua Shi, Nozomu Togawa
Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015   30 Sep 2015   
© 2015 IEEE. For realizing better trade-off between performance and yield rate in recent LSI designs, it is required to deal with increasing the ratios of interconnect delay as well as delay variation. In this paper, a novel floorplan-aware high-l...
Shuai Shao, Youhua Shi, Wentao Dai, Jianyi Meng, Weiwei Shan
Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015   30 Sep 2015   
© 2015 IEEE. A universal delay monitor used to imitate the real critical paths is developed for variation resilient integrated circuit. This monitor is constructed based on the different proportion of logic cells and interconnects. The delay of th...
A Score-Based Classification Method for Identifying Hardware-Trojans Inserted/Free Gate-Level Netlists
11 Mar 2015   

Association Memberships

 
 

Research Grants & Projects

 
Research on delay test techniques for ultra-low power designs
Design Methods for Crypto LSI Implementations and Testing
Automatic False Path Identification and Test Synthesis System Development to Avoid Overtesting