片下敏宏 (Toshihiro Katashita) - マイポータル

基本情報

所属: 国立研究開発法人産業技術総合研究所ナノエレクトロニクス研究部門主任研究員

学位: 博士（工学）(筑波大学大学院)

J-GLOBAL ID: 200901072503838035
researchmap会員ID: 5000102384

外部リンク: http://www.aist.go.jp/RESEARCHERDB/cgi-bin/worker_detail.cgi?call=namae&rw_id=T24032756

研究キーワード

研究分野

論文

A 65-nm SOTB implementation of a physically unclonable function and its performance improvement by body bias control

Yohei Hori, Toshihiro Katashita, Yasuhiro Ogasahara

2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 2018- 1-3 2018年3月7日査読有り
Development of an evaluation platform and performance experimentation of flex power FPGA device

Toshihiro Katashita, Masakazu Hioki, Yohei Hori, Hanpei Koike

IEICE Transactions on Information and Systems E101D(2) 303-313 2018年2月1日査読有り
Prototype of USB stick-sized PUF module for authentication and key generation

Toshihiro Katashita, Yohei Hori, Yasuhiro Ogasahara

2017 IEEE 6th Global Conference on Consumer Electronics, GCCE 2017 2017- 1-2 2017年12月19日査読有り
Organic physically unclonable function on flexible substrate operable at 2 V for IoT/IoE security applications

Kazunori Kuribara, Yohei Hori, Toshihiro Katashita, Kazuaki Kakita, Yasuhiro Tanaka, Manabu Yoshida

ORGANIC ELECTRONICS 51 137-141 2017年12月査読有り
Architecture Enhancements in 65nm SOTB Power Reconfigurable FPGA by Fine-Grained Body Biasing

Masakazu Hioki, Toshihiro Katashita, Hanpei Koike

2016 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) 2016年査読有り
A Silicon-Level Countermeasure Against Fault Sensitivity Analysis and Its Evaluation

Sho Endo, Yang Li, Naofumi Homma, Kazuo Sakiyama, Kazuo Ohta, Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Jean-Luc Danger, Takafumi Aoki

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 23(8) 1429-1438 2015年8月査読有り
Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage

Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ho Le …

IEICE TRANSACTIONS ON ELECTRONICS E97C(4) 272-279 2014年4月査読有り
Performance analysis for PUF data using fuzzy extractor

Hyunho Kang, Yohei Hori, Toshihiro Katashita, Manabu Hagiwara, Keiichi Iwamura

Lecture Notes in Electrical Engineering 280 277-284 2014年査読有り
Evaluation of physical unclonable functions for 28-nm process field-programmable gate arrays

Yohei Hori, Hyunho Kang, Toshihiro Katashita, Akashi Satoh, Shinichi Kawamura, Kazukuni Kobara

Journal of Information Processing 22(2) 344-356 2014年査読有り
Development of Human Resources in Hardware Security through Practical Information Technology Education Program

Naofumi Homma, Yu-ichi Hayashi, Toshihiro Katashita, Hideaki Sone

2014 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC) 764-767 2014年査読有り
Cryptographic Key Generation from PUF Data Using Efficient Fuzzy Extractors

Hyunho Kang, Yohei Hori, Toshihiro Katashita, Manabu Hagiwara, Keiichi Iwamura

2014 16TH INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION TECHNOLOGY (ICACT) 23-26 2014年査読有り
Correlation Power Analysis using Bit-Level Biased Activity Plaintexts against AES Cores with Countermeasures

Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yuichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le …

2014 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, TOKYO (EMC'14/TOKYO) 306-309 2014年査読有り
A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation

Daisuke Fujimoto, Toshihiro Katashita, Akihiko Sasaki, Yohei Hori, Akashi Satoh, Makoto Nagata

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES E96A(12) 2533-2541 2013年12月査読有り
Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption

Yohei Hori, Toshihiro Katashita, Hirofumi Sakane, Kenji Toda, Akashi Satoh

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS E96D(11) 2333-2343 2013年11月査読有り
PUF Evaluation with Post-processing and Modified Modeling Attack

Kang Hyunho, Hori Yohei, Katashita Toshihiro, Satoh Akashi, Iwamura Keiichi

International Journal of Security and Its Applications (IJSIA) 7 231-242 2013年7月査読有り
A novel smart card development platform for evaluating physical attacks and PUFs

Toshihiro Katashita, Akihiko Sasaki, Yohei Hori

2013 IEEE 2nd Global Conference on Consumer Electronics, GCCE 2013 37-39 2013年査読有り
Energy and area saving effect of Dynamic Partial Reconfiguration on a 28-nm process FPGA

Yohei Hori, Toshihiro Katashita, Kazukuni Kobara

2013 IEEE 2nd Global Conference on Consumer Electronics, GCCE 2013 217-218 2013年査読有り
On-chip power noise measurements of cryptographic VLSI circuits and interpretation for side-channel analysis

D. Fujimoto, N. Miura, Y. Hayashi, N. Homma, Y. Hori, T. Katashita, K. Sakiyama, T. H. Le, J. Bringer, P. Bazargan-Sabet …

2013 International Symposium on Electromagnetic Compatibility 405-410 2013年査読有り
Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates

Miroslav Knezevic, Kazuyuki Kobayashi, Jun Ikegami, Shin'ichiro Matsuo, Akashi Satoh, Uenal Kocabas, Junfeng Fan, Toshihiro Katashita, Takeshi Sugawara, Kazuo Sakiyama …

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 20(5) 827-840 2012年5月査読有り
SASEBO-GIII: A hardware security evaluation board equipped with a 28-nm FPGA

Yohei Hori, Toshihiro Katashita, Akihiko Sasaki, Akashi Satoh

1st IEEE Global Conference on Consumer Electronics 2012, GCCE 2012 657-660 2012年査読有り

もっとみる

MISC

複数の映像を画面上で合成表示する VRのための表示装置の開発

日本バーテャルリアリティ学会第9回大会 447-450 2004年
REX: a reconfigurable experimental system for evaluating parallel computer systems

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS E86-D(10) 2003年

共同研究・競争的資金等の研究課題

書き換え可能なデバイスによる高速パケット処理の研究

科学研究費補助金 2003年 - 2007年