In this report, a hardware architecture of two-dimensional non-separable GenLOT is proposed based on the block processing and lifting scheme. The discrete cosine transform (DCT) adopted in JPEG and MPEG-2, or the discrete wavelet transform (DWT) used in JPEG2000 are not suitable for the expression of diagonal textures and edges because these transforms are separable. The non-separable GenLOT proposed by the authors is suitable for the expression of diagonal textures and edges because it can take directionality and has block-wise implementation which maintains the orthogonality. However, there is a problem in the process in teams of the computational cost. It is expected that a specific hardware yields effective solution to this problem. Therefore, in this study, it is suggested to realize the two-dimensional non-separable GenLOT on hardware architecture by the block-wise handling and lifting scheme. The circuit module to be implemented on hardware is modeled by VHDL and the speed and area are evaluated from the synthesis reports.