Presentations

Jun 10, 1999

A VLSI Architecture of Median-Cut Quantization for Low-Bit Motion Estimation

Technical report of IEICE. DSP
  • MURAMATSU Shogo
  • ,
  • KIYA Hitoshi
  • ,
  • YAMADA Akihiko

Language
English
Presentation type
Oral presentation (general)

In this work, a bit-operation algorithm for the median-cut quantization (MCQ) is proposed and then the VLSI architecture is provided for low-bit block matching motion estimation. MCQ is the thechnique that reduces multi-valued samples to binary-valued ones by adaptively taking the median value as the threshold. In the proposed method, the search process of the median value is derived from the quick-sort algorithm. Samples are quantized during the search process. Firstly, the bit-serial procedure is shown, and then it is modified to the bit-parallel procedure. The extension to the multi-level quantization is also discussed. Since the proposed algorithm is based on bit poerations, it is suitable for the VLSI implementation. To verify the significance, for the application to the motion estimation, the performance is estimated from the synthesis result of the VHDL model.

Link information
URL
http://ci.nii.ac.jp/naid/110003280113