論文

査読有り
2018年

Radiation hardness of silicon-on-insulator pixel devices

Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
  • Kazuhiko Hara
  • ,
  • Wataru Aoyagi
  • ,
  • Daisuke Sekigawa
  • ,
  • Shikie Iwanami
  • ,
  • Shunsuke Honda
  • ,
  • Toru Tsuboyama
  • ,
  • Yasuo Arai
  • ,
  • Ikuo Kurachi
  • ,
  • Toshinobu Miyoshi
  • ,
  • Miho Yamada
  • ,
  • Yoichi Ikegami

924
21
開始ページ
426
終了ページ
430
記述言語
英語
掲載種別
研究論文(学術雑誌)
DOI
10.1016/j.nima.2018.05.077
出版者・発行元
Elsevier B.V.

Silicon-on-Insulator (SOI) CMOS is an attractive technology because of pixel sensor applications for its inherent advantages such as superior isolation of each FET by the surrounding insulator. We have been developing SOI pixel devices since 2005 using the FD-SOI technology and noticed that the insulator layers impose significant sensitivity to the total ionization dose (TID) effect. Research activities in the last ten years to improve radiation hardness are reviewed, such as introduction of buried wells and double SOI wafers.

リンク情報
DOI
https://doi.org/10.1016/j.nima.2018.05.077
ID情報
  • DOI : 10.1016/j.nima.2018.05.077
  • ISSN : 0168-9002
  • SCOPUS ID : 85048877844

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