2014年
A jitter suppression technique against data pattern dependency on high-speed interfaces for highly integrated SoCs
IEICE ELECTRONICS EXPRESS
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- 巻
- 11
- 号
- 22
- 記述言語
- 英語
- 掲載種別
- 研究論文(学術雑誌)
- DOI
- 10.1587/elex.11.20140949
- 出版者・発行元
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
This paper proposes a jitter suppression technique for a high-speed interface macro by decreasing the disturbance onto a power node of the macro. The power node fluctuates in accordance with the output data pattern from the macro. Namely, it becomes lower at the dense data pattern and returns near to an initial value at the sparse data pattern. This fluctuation causes the jitter and deteriorates the data eye on the output node. The proposed scheme relaxes the dense and sparse pattern dependency by decreasing the fluctuation. Simulation results show a significant suppression of i) the power node fluctuation from 20 mV to 8 mV, and ii) the jitter from 160 ps to 60 ps on the data eye. Clear data eye openings were obtained at various data rates on actual measurements.
- リンク情報
- ID情報
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- DOI : 10.1587/elex.11.20140949
- ISSN : 1349-2543
- Web of Science ID : WOS:000346400600009