澁谷利行 (TOSHIYUKI SHIBUYA) - マイポータル

A Decomposition Method for Makespan Minimization in Job-Shop Scheduling Problem Using Ising Machine

Daichi Shimada, Toshiyuki Shibuya, Takayuki Shibasaki

2021 IEEE 8th International Conference on Industrial Engineering and Applications, ICIEA 2021 307-314 2021年4月

澁谷利行

生産システム部門講演会講演論文集 2019 key 2019年

A 32Gb/s wireline receiver with a low-frequency equalizer, CTLE and 2-tap DFE in 28nm CMOS.

Samir Parikh, Tony Kao, Yasuo Hidaka, Jian Jiang, Asako Toda, Scott McLeod, William W. Walker, Yoichi Koyanagi, Toshiyuki Shibuya, Jun Yamada

2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers(ISSCC) 28-29 2013年

A 4-channel 10.3Gb/s transceiver with adaptive phase equalizer for 4-to-41dB loss PCB channel.

Yasuo Hidaka, Takeshi Horie, Yoichi Koyanagi, Takashi Miyoshi, Hideki Osone, Samir Parikh, Subodh M. Reddy, Toshiyuki Shibuya, Yasushi Umezawa, William W. Walker

IEEE International Solid-State Circuits Conference(ISSCC) 346-348 2011年

A New Strategy for Simultaneous Escape Based on Boundary Routing.

Lijuan Luo, Tan Yan, Qiang Ma 0002, Martin D. F. Wong, Toshiyuki Shibuya

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 30(2) 205-214 2011年

"Condition-based" dummy fill insertion method based on ECP and CMP predictive models.

Izumi Nitta, Yuji Kanazawa, Daisuke Fukuda, Toshiyuki Shibuya, Naoki Idani, Masaru Ito, Osamu Yamasaki, Norihiro Harada, Takanori Hiramoto

11th International Symposium on Quality of Electronic Design (ISQED 2010)(ISQED) 198-205 2010年

B-escape: a simultaneous escape routing algorithm based on boundary routing.

Lijuan Luo, Tan Yan, Qiang Ma 0002, Martin D. F. Wong, Toshiyuki Shibuya

Proceedings of the 2010 International Symposium on Physical Design(ISPD) 19-25 2010年

Generation of yield-embedded Pareto-front for simultaneous optimization of yield and performances.

Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya, Yuzi Kanazawa

Proceedings of the 47th Design Automation Conference(DAC) 909-912 2010年

Efficiently finding the 'best' solution with multi-objectives from multiple topologies in topology library of analog circuit.

Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya

Proceedings of the 14th Asia South Pacific Design Automation Conference(ASP-DAC) 498-503 2009年

Efficient Power Network Analysis Considering Multidomain Clock Gating.

Wanping Zhang, Wenjian Yu, Xiang Hu, Ling Zhang, Rui Shi 0003, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya …

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 28(9) 1348-1358 2009年

Find the 'Best' Solution from Multiple Analog Topologies via Pareto-Optimality.

Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences 92-A(12) 3035-3043 2009年

Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network.

Wanping Zhang, Yi Zhu 0002, Wenjian Yu, Ling Zhang, Rui Shi 0003, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya …

Design, Automation and Test in Europe(DATE) 537-540 2008年

Non-Gaussian Statistical Timing models of die-to-die and within-die parameter variations for full chip analysis.

Katsumi Homma, Izumi Nitta, Toshiyuki Shibuya

Proceedings of the 13th Asia South Pacific Design Automation Conference(ASP-DAC) 292-297 2008年

Fast power network analysis with multiple clock domains.

Wanping Zhang, Ling Zhang, Rui Shi 0003, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng

25th International Conference on Computer Design(ICCD) 456-463 2007年

Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies?

Chung-Kuan Cheng, Steve Lin, Andrew B. Kahng, Keh-Jeng Chang, Vijay Pitchumani, Toshiyuki Shibuya, Roberto Suaya, Zhiping Yu, Fook-Luen Heng, Don MacMillen

Proceedings of the 2005 Conference on Asia South Pacific Design Automation(ASP-DAC) 2005年

PDL: A New Physical Synthesis Methodology.

Toshiyuki Shibuya, Rajeev Murgai, Tadashi Konno, Kazuhiro Emi, Kaoru Kawamura

4th International Symposium on Quality of Electronic Design (ISQED 2003)(ISQED) 348-354 2003年

Large scale circuit partitioning with loose/stable net removal and signal flow based clustering.

Jason Cong, Honching Peter Li, Sung Kyu Lim, Toshiyuki Shibuya, Dongmin Xu

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design(ICCAD) 441-446 1997年

Touch and Cross Router.

Kaoru Kawamura, Tatsuya Shindo, Toshiyuki Shibuya, Hideki Miwatari, Yoshie Ohki

IEEE/ACM International Conference on Computer-Aided Design(ICCAD) 56-59 1990年

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