Ryota Yasudo

J-GLOBAL         Last updated: Oct 14, 2019 at 14:54
 
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Name
Ryota Yasudo
Affiliation
Hiroshima University
Section
School of Informatics and Data Science

Research Areas

 
 

Academic & Professional Experience

 
Apr 2019
 - 
Today
Hiroshima University
 

Awards & Honors

 
Dec 2018
IEEE Computer Society Young Author Award, IEEE Computer Society Tokyo/Japan Joint Chapter
 
Nov 2018
k-Optimized Path Routing for High-Throughput Data Center Networks, Outstanding Paper Award, The Sixth International Symposium on Computing and Networking (CANDAR2018)
Winner: Ryuta Kawano, Ryota Yasudo, Hiroki Matsutani and Hideharu Amano
 

Published Papers

 
Dual-Plane Isomorphic Hypercube Network
Takeo Hosomi, Ryota Yasudo, Michihiro Koibuchi, and Shinji Shimojo
International Conference on High Performance Computing in Asia Pacific Region      Jan 2020   [Refereed]
Folded Bloom Filter for High Bandwidth Memory, with GPU implementations
Masatoshi Hayashikawa, Koji Nakano, Yasuaki Ito, and Ryota Yasudo
International Symposium on Computing and Networking      Nov 2019   [Refereed]
The Degree/Diameter Problem for Host-Switch Graphs
Ryota Yasudo and Koji Nakano
International Workshop on Parallel and Distributed Algorithms and Applications, in conjunction with CANDAR 2019      Nov 2019   [Refereed]
Efficient implementations of Bloom filter using block RAMs and DSP slices on the FPGA
Takuma Wada, Naoki Matsumura, Ryota Yasudo, Koji Nakano, Yasuaki Ito
Concurrency and Computation: Practice and Experience      Aug 2019   [Refereed]
Ryota Yasudo, Michihiro Koibuchi, Koji Nakano, Hiroki Matsutani, Hideharu Amano
IEEE Trans. Parallel Distrib. Syst.   30(2) 315-330   Feb 2019   [Refereed]
Theoretical Design Methodology for Practical Interconnection Networks
Ryota Yasudo
Keio University      Jan 2019   [Refereed]
A Generalized Theory based on the Turn Model for Deadlock-Free Irregular Networks
uta Kawano, Ryota Yasudo, Hiroki Matsutani, Michihiro Koibuchi, and Hideharu Amano
IEICE Transactions on Information and Systems      2019   [Refereed]
Performance Estimation for Exascale Reconfigurable Dataflow Platforms
Ryota Yasudo, Jose Gabriel Figueiredo Continho, Ana Lucia Varbanescu, Wayne Luk, Hideharu Amano, and Tobias Becker
International Conference on Field-Programmable Technology      Dec 2018   [Refereed]
Ryuta Kawano,Ryota Yasudo,Hiroki Matsutani,Hideharu Amano
Sixth International Symposium on Computing and Networking, CANDAR 2018   99-105   Nov 2018   [Refereed]
Ryota Yasudo,Ana Lucia Varbanescu,José Gabriel F. Coutinho,Wayne Luk,Hideharu Amano
26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018   220   Apr 2018   [Refereed]
Hiroshi Nakahara,Ng. Anh Vu Doan,Ryota Yasudo,Hideharu Amano
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017   17:1-17:8   Oct 2017   [Refereed]
Hiroshi Nakahara,Ryota Yasudo,Hiroki Matsutani,Hideharu Amano,Michihiro Koibuchi
14th International Symposium on Pervasive Systems, Algorithms and Networks & 11th International Conference on Frontier of Computer Science and Technology & Third International Symposium of Creative Computing, ISPAN-FCST-ISCC 2017   52-59   Jun 2017   [Refereed]
Ryota Yasudo,Michihiro Koibuchi,Koji Nakano,Hiroki Matsutani,Hideharu Amano
46th International Conference on Parallel Processing, ICPP 2017   322-331   Aug 2017   [Refereed]
Ryuta Kawano,Ryota Yasudo,Hiroki Matsutani,Michihiro Koibuchi,Hideharu Amano
23rd IEEE International Conference on Parallel and Distributed Systems, ICPADS 2017   664-673   Dec 2017   [Refereed]
Ryota Yasudo,Hiroki Matsutani,Michihiro Koibuchi,Hideharu Amano,Tadao Nakamura
IEEE Trans. Computers   66(4) 702-716   2017   [Refereed]
Ryota Yasudo,Hiroki Matsutani,Michihiro Koibuchi,Hideharu Amano,Tadao Nakamura
Proceedings of the 9th International Symposium on Networks-on-Chip, NOCS 2015   16:1-16:8   Sep 2015   [Refereed]
Ryota Yasudo,Takahiro Kagami,Hideharu Amano,Yasunobu Nakase,Masashi Watanabe,Tsukasa Oishi,Toru Shimizu,Tadao Nakamura
Eighth IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014   111-118   Sep 2014   [Refereed]
Ryota Yasudo,Takahiro Kagami,Hideharu Amano,Yasunobu Nakase,Masashi Watanabe,Tsukasa Oishi,Toru Shimizu,Tadao Nakamura
2014 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVII   1-3   Apr 2014   [Refereed]

Conference Activities & Talks

 
Degree/Diameter Problem for Host-Switch Graphs
Ryota Yasudo
Sep 2019   
Graph-theoretic Perspective on Network Topology for Supercomputers [Invited]
Ryota Yasudo
First mini Symposium on Computing and Networking   Jun 2019   
Interconnection Networks with the Optimal Number of Switches and the Optimal Host Distribution [Invited]
Ryota Yasudo
CANDAR Extreme Infrastructure Workshop   Nov 2018   
Graph-Theoretic Approach for Designing Low-Latency Interconnection Networks
Ryota Yasudo
Sep 2018