2014年
Investigation in Burst Pulse Injection Method for Fault Based Cryptanalysis
2014 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC)
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- 開始ページ
- 743
- 終了ページ
- 747
- 記述言語
- 英語
- 掲載種別
- 研究論文(国際会議プロシーディングス)
- 出版者・発行元
- IEEE
This paper investigated about introduction of the burst pulse injection method standardized for immunity tests to a cryptanalysis using faulty ciphertexts. We investigated the potential of the burst injection method to induce faulty ciphertexts experimentally. Firstly, the standard burst pulse was injected through the power cable to a cryptographic module implementing the Advanced Encryption Standard (AES) on a field programmable gate array (FPGA). As a result, it was confirmed that the burst pulse injection might cause clock glitches on the module. Secondly, the clock glitch was varied in magnitude and timing by use of two pulse generators and transmitted to the AES circuit to clarify what types of clock glitch induce critical faulty ciphertexts suited for recovering the crypto-key successfully. Results confirmed that the clock glitch had potential to induce faulty ciphertexts when it exceeded the threshold and produced a clock interval shorter than the critical path delay in the target round. The two experimental results suggested that burst pulse injection to cryptographic modules through their power cables is a possible scenario of fault analysis attacks.
- リンク情報
- ID情報
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- ISSN : 2158-110X
- Web of Science ID : WOS:000393471300135