2007年
Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop with on-Chip Delay Measurement
IEEE Trans. on Circuits and Systems—II: Express Briefs
- 巻
- vol. 54, no. 10, pp. 868-872
- 号
- DOI
- 10.1109/TCSII.2007.901574
- ID情報
-
- DOI : 10.1109/TCSII.2007.901574