2006年
Power consumption advantage of a dynamic optically reconfigurable gate array
20th International Parallel and Distributed Processing Symposium, IPDPS 2006
- ,
- 巻
- 2006
- 号
- 記述言語
- 英語
- 掲載種別
- 研究論文(国際会議プロシーディングス)
- DOI
- 10.1109/IPDPS.2006.1639490
- 出版者・発行元
- IEEE Computer Society
Optically reconfigurable gate arrays (ORGAs) are a type of field programmable gate array (FPGA). However, unlike FPGAs, an ORGA can quickly be reconfigured optically using external optical memories and optical connections. Recently, various types of ORGAs have been developed. However, their gate counts were not satisfactory compared with those of FPGAs. Therefore, to improve the gate density of conventional ORGAs, a dynamic ORGA (DORGA) architecture that can remove static memory functions to store a configuration context has been proposed. The DORGA architecture offers not only the advantages of a high gate count, but also the advantage of low reconfiguration power consumption. To date, its power consumption has never been clarified. For that reason, this paper presents measurement results of the optical reconfiguration power consumption of a DORGA-VLSI chip. In addition, the power consumption advantages of the DORGA architecture are clarified through comparison with other ORGAs. © 2006 IEEE.
- ID情報
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- DOI : 10.1109/IPDPS.2006.1639490
- SCOPUS ID : 33847174702