論文

査読有り
2010年

Impact of Ge nitride interfacial layers on performance of Metal Gate/High-k Ge-nMISFETs

2010 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS
  • Tatsuro Maeda
  • ,
  • Yukinori Morita
  • ,
  • Shinichi Takagi

開始ページ
213
終了ページ
214
記述言語
英語
掲載種別
研究論文(国際会議プロシーディングス)
DOI
10.1109/VLSIT.2010.5556232
出版者・発行元
IEEE

We propose a novel formation process of a Ge nitride interfacial layer (NIL) and demonstrate successful Ge-nMISFETs operation with NIL, for the first time. We also examine the impact of NIL on the performance of the nMISFETs. It is found that, compared to an oxide interfacial layer (OIL), NIL is quite effective in suppressing the generation of positive fixed charges and electron trapping centers in high-k/Ge gate stacks which degrade the FET performance. By combining NIL with HfO2 deposition, we successfully achieve excellent Ge-nMISFET operations, such as the SS of 74mV/dec. and high electron mobility of 870cm(2)/Vs, compellable to that of Si. This is the highest electron mobility value for Ge(100)-nMISFETs with high-k gate stacks.

リンク情報
DOI
https://doi.org/10.1109/VLSIT.2010.5556232
Web of Science
https://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=JSTA_CEL&SrcApp=J_Gate_JST&DestLinkType=FullRecord&KeyUT=WOS:000287495500081&DestApp=WOS_CPL
ID情報
  • DOI : 10.1109/VLSIT.2010.5556232
  • ORCIDのPut Code : 45568729
  • Web of Science ID : WOS:000287495500081

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